Genesis

After the successful 8086, 80186, 80286, 80386 and 80486 CPU models AMD produced under license from Intel or by reverse engineering, time came to design their own 586-class chip from the ground up. This intention and initial designs started around 1993 and the CPU was planned to be released in 1995. After some technical difficulties resulting in an 1 year delay the first AMD design eventually came out as the AMD K5.

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K5, the first AMD design

The AMD K5 was a very decent competitor to the Intel Pentium and had a much more powerful FPU unit than the Cyrix 6×86 chips produced at the time, and it was cheap too! The integer arithmetic and logical unit (ALU) was even better than the Intel chips; an AMD K5 PR200 (really running at 133MHz) had roughly the same integer performance as an Intel Pentium 200 but had the FPU power of an Intel Pentium 100…this lead AMD to use a “Processor Rating” system (as did Cyrix) to compare their chips to Intel ones. Internally, it was a RISC design.

The K5 came out relatively late and never sold well despite its qualities, the K5 PR200 was the last chip of the series. It was time for AMD to move forward but they had a real problem: the K5 design didn’t scale well past 150 MHz and their own “K6” development chip had the same issue…it didn’t look terribly well for them.

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A small company called NexGen

At the same time the K5 was designed there was also another small fabless company called “NexGen” which started producing the NexGen Nx586 CPUs in 1994. They were 586-class RISC86 (Reduced Instruction Set Computing) chips running from 70 MHz (P75) to 111 MHz (P120) without an integrated FPU. The lack of FPU wasn’t really a problem when the chip was designed but it also had another big problem…it was incompatible with the Socket 5 motherboards and thus was expensive.

Around 1994 there was a problem though…games requiring an FPU stared to come out and the FPU-less Nx586 was in trouble. It was possible to emulate an FPU in software but of course it was terribly slow. NexGen developed the Nx587 companion chip to address the issue but as far as I know there was never any motherboard sold with both chips. Instead NexGen released the Nx586-PF which was a combination of both previous cores on one physical chip. The Nx586-PF existed in 93 MHz (PF-100) and 102 MHz (PF-110) versions but it is very rare. The NexGen PF-110 had roughly the integer and floating point performance of a Pentium 90. So around 1994/1995 NexGen were in trouble too but they were already working on a next design, the Nx686. In 1995, the Nx686 was a 180 MHz chip with 48kB of L1 cache and some multi-media instructions (similar to MMX).

As you can tell NexGen was a small fabless company (the chips were actually made by IBM) with clever engineers; after all their FPU was about twice as fast as AMD’s K5 design and the brand new Socket 7 compatible Nx686 was just around the corner…so AMD bought them in 1995, took most of the Nx686 design and…welcome AMD K6! Rumours say that the first K6 engineering samples were recognised as “NexGenerationAMD” instead of the “Authentic AMD” we all know. AMD’s own K6 design was not performing as well as NexGen’s one and was discarded.

Now enter 1997, a year of change for the PC industry. Until then most of the CPUs were running on the Socket 5 (320 pins) platform which basically meant the CPU were running at the same voltage for the Core and I/O: 3.3V. This year Intel launched the Pentium MMX, AMD the K6 and Cyrix the 6x86MX (later known as MII); these chips introduced the Socket 7 platform (321 pins) with a different voltage for the Core and I/O.

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K6 – the Pentium MMX competitor

Launched in April 1997, the first K6 were clocked at 166 and 200MHz. Performance-wise the K6 were totally on par with Intel’s Pentium MMX chips, compatible with the same motherboards and also instruction compatible so programers shouldn’t have to worry about anything. It was a cheap CPU compared to Intel’s Pentium MMX and much better performing than the Cyrix ones, so people loved it.

As did the K5, the NexGen chips were using a RISC86 architecture; this means that every x86 instruction coming to the K6 was internally “split” into smaller RISC micro-operations. This design is used by all x86 chips nowadays.

The K6’s RISC86 core could execute 4 micro-ops per CPU cycle; these micro-ops could be executed by 7 execution units: 2 integer units, 1 FPU unit, 1 MMX unit, 1 branch unit, 1 load unit and 1 store unit.

The first models were manufactured using a 0.35 micron process (K6 Model 6) and later AMD moved to a 0.25 micron process for the higher speeds and mobile versions; this core was the K6 Model 7 known as “Little Foot”.

K6 Model 6, Stepping 0 to 15 – no particular core name

• Available speeds: 166, 200 and 233 MHz
• Front Side Bus: 66 MHz
• L1 Cache: 32 + 32 kB (Data + Instructions)
• Instruction set: MMX
• 8.8 million transistors in 0.35 micron
• Release of the first chips: April 1997
• Commercial name: K6

K6 Model 7, Stepping 0 to 15 – Little Foot

• Available speeds: 200, 233, 266 and 300 MHz
• Front Side Bus: 66 MHz
• L1 Cache: 32 + 32 kB (Data + Instructions)
• Instruction set: MMX
• 8.8 million transistors in 0.25 micron
• Release of the first chips: January 1998
• Commercial name: K6

At the end of 1997, Intel also launched the Pentium II on brand new motherboards using a “Slot 1” instead of the “Socket 7”; AMD, Cyrix and some other smaller x86 CPU companies now had to drive the Socket 7 eco-system on their own. At this time some K6 models had a “PR2” marking which was essentially a Performance Rating compared to the Pentium II as it existed on the K5. Quickly realising that the actual K6 performance was the same as the PR2 this marketing scheme was dropped.

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K6-2 – the golden age

With the release of the Pentium II, AMD had to evolve the K6 design from a technological and commercial standpoint so people wouldn’t see it as a simple “fast Pentium MMX without any cool feature”. From a commercial standpoint the “new” chip was launched in May 1998: the K6-2.

From a technological point of view it was a K6 on steroids. First of all the K6-2 saw the introduction of a new SIMD (Single Instruction Multiple Data) instruction set called 3DNow!. It can be seen as a “low precision floating-point MMX” unit and is similar to Intel’s SSE introduced with the Pentium III.

The MMX unit works on integer numbers while 3DNow! works on single-precision floating-point numbers. When used 3DNow! was very performing for FPU intensive applications which didn’t require high floating-point precision; this is for example the case in games. The downside to this technology is the “when used” part…programs had to be patched and compilers upgraded to automatically take advantage of 3DNow!.

The K6-2 core was also extended from 7 to 10 execution units. As for the K6 there were 2 integer units, 1 FPU unit, 1 branch unit, 1 load unit and 1 store unit.; an MMX unit was added as well as 2 3DNow! units. The core itself could now  execute 6 (instead of 4 for the K6) micro-ops per CPU cycle resulting in a performance boost.

The K6-2 also marked the introduction of the “Super Socket 7” platform meaning more modern chipsets supporting SDRAM, AGP and bus speeds up to 100MHz instead of the 66MHz used until then.

The K6-2 was really the core of the K6 Family with numerous models and declinations and gave AMD the financial means to develop the future K7.

K6-2 Model 8, Stepping 0 to 7 – Chomper

• Available speeds: 200, 233, 250, 266, 300, 333, 350 MHz
• Front Side Bus: 66 or 100 MHz
• L1 Cache: 32 + 32 kB (Data + Instructions)
• Instruction set: MMX, 3DNow!
• 9.3 million transistors in 0.25 micron
• Release of the first chips: May 1998
• Commercial name: K6-3D, K6-2, K6-2 Mobile, K6-2 Mobile P, K6-2 Embedded

In 1999 high-end CPUs from Intel and AMD were running from 400 to 500MHz and the K6’s short pipeline meant it could not scale very well beyond the 550MHz barrier.

With the K7 (Athlon) and Pentium III just around the corner AMD had to stretch the K6 even further in a way or another just for some months…as it was impossible to increase the speed more performance had to be found changing the architecture.

The big difference in design and performance came from the introduction of 256kB of cache running at the full CPU speed directly in the CPU core. Before that, the K6 and K6-2 had 64kB of L1 cache in the chip and some L2 cache (usually 512kB) on the motherboard running at the FSB speed (66 to 100MHz). With the K6-III there still was 64kB L1 cache but 256kB L2 cache directly on the CPU running at the CPU speed; the cache on the motherboard was thus an L3 cache and this design was called TriLevel Cache by AMD.

From a performance standpoint this change made the K6-III the fastest CPU on the market for integer calculations, around 20% faster than the K6-2 at the same speed. This lead was short however as the Pentium III came out only a couple of days after the K6-III.

Compared to the 9.3 million transistors on a K6-2, the K6-III was a 21.4 million transistors design making it hard and expensive to produce. It was really a temporary solution until the K7 could be launched that same year. As soon as the K7 was launched, the K6-III quickly went out of production; AMD still produced the cheap K6-2 for a long time.

Some minor revisions also came out for the mobile and embedded market, these were the K6-2+ with only 128kB of on-die L2 cache and the K6-3+ made using a 0.18 micron process.

They had another minor evolution which was Enhanced 3DNow! which added 5 DSP instructions but nobody really used them.

They also had a PowerNow! feature to…save power by dynamically change the CPU frequency depending on the work load. The very last and fastest K6 chip ever officially produced was the K6-2+ 570 MHz.

K6-III Model 9, Stepping 0 to 3 – Sharptooth

• Available speeds: 333, 350, 366, 380, 400, 433 and 450 MHz
• Front Side Bus: 66 or 100 MHz
• L1 Cache: 32 + 32 kB (Data + Instructions)
• L2 cache: 256kB on-die at full speed
• Instruction set: MMX, 3DNow!
• 21,4 million transistors in 0.25 micron
• Release of the first chips: February 1999
• Commercial name: K6-III, K6-III-P Mobile

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Conclusion

With the release of the Pentium III and K7 (Athlon) in 1999/2000 the K6 architecture clearly was on its last legs. It still continued to exist for a while in the Embedded markets and in countries where cheap computers made sense.

Over its 4 years of life the K6 were always well balanced, didn’t suffer from any major bug or problem and over all were good value for money if you couldn’t or wouldn’t pay twice the price for the top-end Intel chip.

One thing to note is that AMD (like Cyrix) had the reputation to manufacture unstable CPUs at that time; this mostly comes from the fact that third-party chipsets all had some kind of bugs and that the K6 was often used in low-end computers with dodgy motherboards.

For the K7 (Athlon), as with NexGen, AMD took over lots of ex-Alpha engineers which made the blazing fast EV6/EC67 and EV68 CPUs; needless to say that the Athlon was a very successful and fast chip…